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 STP5N120
N-channel 1200V - 2.8 - 4.4A - TO-220 Zener - protected SuperMESHTM Power MOSFET
TARGET SPECIFICATION
Features
Type STP5N120

VDSS 1200V
RDS(on) < 3.5
ID 4.4A
PW 160W
100% avalanche tested Extremely high dv/dt capability ESD improved capability New high voltage benchmark Gate charge minimized
TO-220
1 2 3
Description
The SuperMESHTM series is obtained through an extreme optimization of ST's well established strip-based PowerMESHTM layout. In addition to pushing on-resistance significantly down, special care is taken to ensure a very good dv/dt capability for the most demanding applications. Such series complements ST full range of high voltage Power MOSFETs.
Internal schematic diagram
Application
Switching application
Order code
Part number STP5N120 Marking 5N120 Package TO-220 Packaging Tube
May 2007
Rev 1
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www.st.com 10
This is preliminary information on a new product foreseen to be developed. Details are subject to change without notice.
Contents
STP5N120
Contents
1 2 3 4 5 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Test circuit ................................................ 6
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
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STP5N120
Electrical ratings
1
Electrical ratings
Table 1.
Symbol VDS VGS ID ID IDM (1)
Absolute maximum ratings
Parameter Drain-source voltage (VGS=0) Gate-source voltage Drain current (continuous) at TC = 25C Drain current (continuous) at TC = 100C Drain current (pulsed) Derating factor Value 1200 30 4.4 2.772 17.6 1.28 160 3000 4.5 -55 to 150 Unit V V A A A W/C W V V/ns C
PTOT VESD(G-S) dv/dt (2) Tj Tstg
Total dissipation at TC = 25C Gate source ESD (HBM-C = 100pF, R= 1.5K) Peak diode recovery voltage slope Operating junction temperature Storage temperature
1. Pulse width limited by safe operating area 2. ISD 4.4A, di/dt 200A/s, VDD 80% V(BR)DSS
Table 2.
Symbol Rthj-case
Thermal data
Parameter Thermal resistance junction-case max Value 0.78 62.5 300 Unit C/W C/W C
Rthj-amb (1) Thermal resistance junction-amb max Tl Maximum lead temperature for soldering purpose
1. When mounted on 1inch FR-4 board, 2 oz Cu
Table 3.
Symbol IAS EAS
Avalanche characteristics
Parameter Avalanche current, repetitive or notrepetitive (pulse width limited by Tj max) Single pulse avalanche energy (starting Tj=25C, ID=IAS, VDD= 50V) Max value 4.4 Tbd Unit A mJ
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Electrical characteristics
STP5N120
2
Electrical characteristics
(TCASE=25C unless otherwise specified) Table 4.
Symbol V(BR)DSS IDSS IGSS VGS(th) RDS(on)
On/off states
Parameter Drain-source breakdown voltage Zero gate voltage drain current (VGS = 0) Gate body leakage current (VDS = 0) Gate threshold voltage Static drain-source on resistance Test conditions ID = 1mA, VGS= 0 VDS = Max rating, VDS = Max rating,Tc=125C VGS = 30V VDS= VGS, ID = 100A VGS= 10V, ID= 2.3A 3 3.75 2.8 Min. 1200 1 50 10 4.5 3.5 Typ. Max. Unit V A A A V
Table 5.
Symbol gfs(1) Ciss Coss Crss Coss eq.(2) RG Qg Qgs Qgd
Dynamic
Parameter Forward transconductance Input capacitance Output capacitance Reverse transfer capacitance Equivalent output capacitance Intrinsic gate resistance Total gate charge Gate-source charge Gate-drain charge Test conditions VDS = 15V, ID = 2.3A Min. Typ. Tbd 120 115 25 50 Tbd 55 8 22 Max. Unit S pF pF pF pF nC nC nC
VDS =25V, f=1MHz, VGS=0
VGS = 0V, VDS = 0V to 800V f = 1MHz open drain VDD=960V, ID = 4.4A VGS =10V (see Figure 2)
1. Pulsed: pulse duration=300s, duty cycle 1.5% 2. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS
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STP5N120
Electrical characteristics
Table 6.
Symbol td(on) tr td(off) tf
Switching times
Parameter Turn-on delay time Rise time Turn-off delay time Fall time Test conditions VDD = 600V, ID = 2.2A, , RG=4.7 VGS=10V (see Figure 4) Min. Typ. Tbd Tbd Tbd Tbd Max. Unit ns ns ns ns
Table 7.
Symbol ISD ISDM VSD(1) trr Qrr IRRM trr Qrr IRRM
1.
Source drain diode
Parameter Source-drain current Source-drain current (pulsed) Forward on voltage Reverse recovery time Reverse recovery charge Reverse recovery current Reverse recovery time Reverse recovery charge Reverse recovery current ISD= 4.4A, VGS=0 ISD= 4.4A, VDD=100V di/dt = 50A/s,Tj=25C (see Figure 3) ISD= 4.4A,VDD=100V di/dt=50A/s,Tj=150C (see Figure 3) Tbd Tbd Tbd Tbd Tbd Tbd Test conditions Min Typ. Max 4.4 17.6 1.6 Unit mA A V ns C A ns C A
Pulsed: pulse duration = 300s, duty cycle 1.5%
Table 8.
Symbol
Gate-source zener diode
Parameter Test conditions Min 30 Typ. Max Unit V
BVGSO (1) Gate-source breakdown voltage Igs 1mA, (open drain)
1. The built-in-back zener diodes have specifically been designed to enhance not only the device's ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. In this respect the zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device's integrity. These integrated zener diodes thus avoid the usage of external components.
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Test circuit
STP5N120
3
Figure 1.
Test circuit
Switching times test circuit for resistive load Figure 2. Gate charge test circuit
Figure 3.
Test circuit for inductive load Figure 4. switching and diode recovery times
Unclamped inductive load test circuit
Figure 5.
Unclamped inductive waveform
Figure 6.
Switching time waveform
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STP5N120
Package mechanical data
4
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a Lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com
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Package mechanical data
STP5N120
TO-220 mechanical data
mm Dim Min A b b1 c D D1 E e e1 F H1 J1 L L1 L20 L30 P Q 4.40 0.61 1.14 0.49 15.25 1.27 10 2.40 4.95 1.23 6.20 2.40 13 3.50 16.40 28.90 3.75 2.65 3.85 2.95 0.147 0.104 10.40 2.70 5.15 1.32 6.60 2.72 14 3.93 0.393 0.094 0.194 0.048 0.244 0.094 0.511 0.137 Typ Max 4.60 0.88 1.70 0.70 15.75 Min 0.173 0.024 0.044 0.019 0.6
inch Typ Max 0.181 0.034 0.066 0.027 0.62 0.050 0.409 0.106 0.202 0.051 0.256 0.107 0.551 0.154 0.645 1.137 0.151 0.116
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STP5N120
Revision history
5
Revision history
Table 9.
Date 21-May-2007
Revision history
Revision 1 First release Changes
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STP5N120
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Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST's terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein.
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